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Preliminary Data Sheet
SERIAL PRESENCE-DETECT MATRIX
Rev.0.9
20.09.2011
Byte
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Byte Description
CRC RANGE, EEPROM BYTES, BYTES USED
SPD REVISON
DRAM DEVICE TYPE
MODULE TYPE (FORM FACTOR)
SDRAM DEVICE DENSITY & BANKS
SDRAM DEVICE ROW & COLUMN COUNT
DDR3 MODULE NOMINAL VDD
MODULE RANKS & DEVICE DQ COUNT
ECC TAG & MODULE MEMORY BUS WIDTH
FINE TIMEBASE DIVIDEND/DIVISOR
MEDIUM TIMEBASE DIVIDEND
MEDIUM TIMEBASE DIVISOR
MIN SDRAM CYCLE TIME (t CK MIN )
BYTE 13 RESERVED
CAS LATENCIES SUPPORTED (CL4 => CL11)
CAS LATENCIES SUPPORTED (CL12 => CL18)
MIN CAS LATENCY TIME (t AA MIN )
MIN WRITE RECOVERY TIME (t WR MIN )
MIN RAS# TO CAS# DELAY (t RCD MIN )
MIN ROW ACTIVE TO ROW ACTIVE DELAY (t RRD MIN )
MIN ROW PRECHARGE DELAY (t RP MIN )
UPPER NIBBLE FOR t RAS & t RC
MIN ACTIVE TO PRECHARGE DELAY (t RAS MIN )
MIN ACTIVE TO ACTIVE/REFRESH DELAY (tRCMIN)
MIN REFRESH RECOVERY DELAY (t RFC MIN ) LSB
MIN REFRESH RECOVERY DELAY (t RFC MIN ) MSB
MIN INTERNAL WRITE TO READ CMD DELAY (t WTR MIN )
MIN INTERNAL READ TO PRECHARGE CMD DELAY
(t RTP MIN )
MIN FOUR ACTIVE WINDOW DELAY (t FAW MIN ) MSB
MIN FOUR ACTIVE WINDOW DELAY (t FAW MIN ) LSB
SDRAM DEVICE OUTPUT DRIVERS SUPPORTED
SDRAM DEVICE THERMAL & REFRESH OPTIONS
10600-999
0x0C
0x3E
0x30
0x20
0x89
0x00
0xF0
0x92
0x11
0x0B
0x08
0x0 4
0x 21
0x0 2
0x09
0x0B
0x52
0x01
0x08
0x00
0x00
0x69
0x78
0x69
0x69
0x11
0x20
0x08
0x3C
0x3C
0x83
0x01
8500-777
0x0F
0x3E
0x3C
0x2C
0x95
0x01
0x2C
Swissbit AG
Industriestrasse 4
CH – 9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
www.swissbit.com
eMail: info@swissbit.com
Page 13
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